Process Design Kit Roadmap for Photonic Integration

The potential of a foundry process is, to a large extent, determined by the maturity of the technology reflected in the contents of the Process Design Kit provided to its users. Such a PDK is compatible with design software and contains in general:
• Technology set-up files, describing the mask layers involved in the fabrication process,
• Pre-defined mask layouts and specifications for a set of Basic Building Blocks,
• Mask layout and accurate models for a variety of more complex components,
• Design and verification rules.

Present situation 2014
All four JePPIX foundries have a process design kit containing a component library providing the mask layout for Basic Building Blocks and the most commonly used Composite Building Blocks, such as MMI splitters and AWG de/multiplexers. In the accompanying Design Manual, some numbers on component performance are given, but the specification is not yet complete and no statistics are provided. Some design rules are checked by the mask layout software, but at a very basic level. In the past two years altogether more than 200 designs have been fabricated using these process design kits, in the projects EuroPIC, PARADIGM and Memphis as well as in commercial activities.

Roadmap 2016
To obtain more mature PDKs, activities will be undertaken to further stabilise the process performance and to collect in-line and off-line measurement data from the fabrication processes and test structures. This work will drive the compact model development for the components in the libraries, enabling the ability to simulate more complex Photonic Integrated Circuits, based on accurate models.

Furthermore the number of design rules that are incorporated in the design kits will be increased in number and sophistication to reduce the design errors which may hamper fabrication and/or performance of the circuits.

Due to the open nature of the design eco-system centred on the PDAFlow API, we expect more software vendors to engage and provide design solutions comp atible with the JePPIX PDKs. In addition design modules or intellectual property (IP)-blocks from external parties like design houses, universities or software vendors will start appearing. These will be built on information provided by the foundries in the PDKs.

Furthermore the packaging options for test and low-volume fabrication will be incorporated in packaging templates, to enable design for packaging strategies.

Roadmap 2018
We expect that in 2018 for all the Basic Building Blocks library modules will be available that provide mask layout, accurate component specifications and model descriptions including statistical data to enable application specific tolerance studies. Further, parameterized library modules with simulation models including statistics will be available for a number of frequently used components, like AWGs, MMI-couplers, pulse lasers and tunable CW lasers, rf modulators and detectors. The Design Rule Checkers will have achieved a performance level in which not only are the most common design errors automatically detected, but also warnings given for layouts likely to compromise good circuit performance.

Roadmap 2020
In 2020 we expect the contents and the performance of the PDKs to have further improved. An important novel feature will be the offering of library models for a number of electronic circuits, like drivers and receivers complete with interconnection circuits. Activities on the alignment of the photonics standards with existing initiatives in electronics design standardisation will be undertaken; allowing for better integration of electronics and photonics.

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